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Google AR/VR head Clay Bavor comes up with a remarkable statement emphasizing imaging importance in AR applications:

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BusinessWire: Rambus announces that Dartmouth College-based startup Gigajot Technology has licensed Rambus Binary Pixel technology and patents for use in Gigajot’s next-generation image capture solutions. Gigajot’s Quanta Image Sensor (QIS) enables high-speed counting of single photons of light at gigapixel resolution. The new features enabled by QIS and Binary Pixel Technologies can benefit imaging applications such as scientific, automotive, security, defense, encryption, AR/VR, 3D and consumer photography, among others. Rambus has supported the early work at Dartmouth on the technology.

Rambus Binary Pixel technology combines an imager and a processor architectures to enable high quality images and video from small form factor imagers for compact solutions. The technology senses the photons using discrete thresholds to avoid pixel saturation and enable better light sensitivity. Binary Pixel also employs special oversampling methods, which subdivide pixels, exposure and digitization to capture more data and extend the dynamic range of the imager.

“Traditionally, it has been difficult to achieve acceptable signal-to-noise ratio in low-light situations for quality images,” said Saleh Masoodian, CEO, Gigajot. “Combining the Rambus Binary Pixel technology with Gigajot’s QIS devices enables development of highly sensitive imaging technology via mainstream commercial CMOS fabrication processes for not only consumer devices such as smartphones, tablets and cameras, but also for more high-end commercial pursuits such as scientific, medical, security and surveillance sensors and cameras.”

“Rambus Binary Pixel technology enables improved performance for small, compact image sensors, allowing unprecedented image quality for consumer devices,” said Laura Stark, SVP and general manager, Emerging Solutions of Rambus. “Combining the Gigajot and Rambus cutting-edge imaging technologies will dramatically improve the image capture experience for the next generation of consumers and professionals.”

As a matter of fact, Rambus Emerging Solutions web page does not list imaging technologies anymore. Neither the company product page lists any of the imaging technologies that Rambus developed in the past: HDR sensors, binary pixels, lensless imagers.

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Most of the Yole Developpement webcast on TSV technology is devoted to stacked memory integration, but there is also some image sensor content, especially from 28:00 to 38:00 time:

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MDPI Special Issue on the 2017 International Image Sensor Workshop (IISW) gets one more TSMC paper "A 45 nm Stacked CMOS Image Sensor Process Technology for Submicron Pixel" by Seiji Takahashi, Yi-Min Huang, Jhy-Jyi Sze, Tung-Ting Wu, Fu-Sheng Guo, Wei-Cheng Hsu, Tung-Hsiung Tseng, King Liao, Chin-Chia Kuo, Tzu-Hsiang Chen, Wei-Chieh Chiang, Chun-Hao Chuang, Keng-Yu Chou, Chi-Hsien Chung, Kuo-Yu Chou, Chien-Hsien Tseng, Chuan-Joung Wang, and Dun-Nien Yaung.

"In this work, we demonstrated a low dark current of 3.2 e−/s at 60 °C, an ultra-low read noise of 0.90 e− rms, a high full well capacity (FWC) of 4100 e−, and blooming of 0.5% in 0.9 μm pixels with a pixel supply voltage of 2.8 V. In addition, the simulation study result of 0.8 μm pixels is discussed."

A unit pixel circuit and device partition.

A 45 nm stacked CIS test vehicle.

TG area device optimizations

(a) Regular pixel; (b) crosstalk-improved pixel.

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Espros announces epc611, a new generation 8×8 pixel ToF sensor. The epc611 is said to establish a new industry standard in terms of photon sensitivity, distance measurement frame rate and versatility for a wide range of applications. The small footprint of 2.6 x 2.6mm and bare die packaged epc611 will be produced in cooperation with TSMC.

Sensitivity: epc611 has a 30% enhanced sensitivity in comparison to previous generation ESPROS TOF sensors due to the latest generation TOF pixel design. Only 7.5 nW per millimeter-square of optical power is needed to measure accurately distance. And this under full sunlight condition.

Frame Rate: The epc611 allows up to 8’000 distance measurements per second.

Versatility: epc611 can be configured to operate in 7 different TOF modes. From an 8×8 imager to binning of all pixels into a single large pixel almost anything is possible. Groups of pixels can be configured to operate at different integration times or at different phase angles. In this way the imager can achieve a wide dynamic distance range or catch fast moving objects without generating motion blur.

«We put our entire experience in this new generation sensor», says Beat De Coi, CEO and founder of ESPROS Photonics. «I built sensors my whole life and know about the quite individual requirements that need to be satisfied. Therefore I wanted this chip to come with all configuration options that we could think of. And now its here!».

The new epc611 TOF sensor is available now. Several pilot customers have epc611 already in their labs. A first distance measurement module is under development and will be released soon.

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IEDM Image Sensor session has a nice selection of 6 papers. IEDM publishes figures from two of the presentations:

16.4 Near-infrared Sensitivity Enhancement of a Back-illuminated Complementary Metal Oxide Semiconductor Image Sensor with a Pyramid Surface for Diffraction Structure,
I. Oshiyama, S. Yokogawa, H. Ikeda, Y. Ebiko, T. Hirano, S. Saito, T. Oinoue, Y. Hagimoto, H. Iwamoto, Sony Semiconductor

Boosting Near-Infrared Sensitivity in CMOS Imagers: Backside-illuminated CMOS image sensors are ubiquitous in camera phones, and there is a growing demand for them to be able to handle near-infrared (NIR) light frequencies so that they can be used in iris scanning, facial recognition and motion-sensing applications. However, the NIR-sensitivity of silicon CMOS image sensors has been inadequate. The simplest way to enhance it would be to make the photo-absorption layer thicker, but that would require substantial capital investment in manufacturing equipment like high-energy ion implanters to be able to work with the thicker layer. Instead, Sony researchers developed a way to increase the NIR sensitivity of a 2-megapixel backside imager by building pyramidal light-diffraction structures on its surface. These 400nm structures diffract and trap the light coming to each pixel. The researchers also isolated each 1.12µm pixel from its neighbors by means of a special treatment process and used deep trench isolation to reduce crosstalk. They achieved a 50% increase in NIR sensitivity and a quantum efficiency of 30% at 850nm. Image resolution and levels of dark current (i.e., electrical “noise”) were not compromised.

The image is a photomicrograph of a section of a backside-illuminated CMOS image sensor with a cell size of 1.12µm and pyramid surfaces for diffraction (PSD) and deep-trench isolation (DTI) structures. The PSD pitch was 400 nm.


16.3 Back-side Illuminated GeSn Photodiode Array on Quartz Substrate Fabricated by Laser-induced Liquid-phase Crystallization for Monolithically-integrated NIR Imager Chip,
H. Oka, K. Inoue, T. T. Nguyen*, S. Kuroki*, T. Hosoi, T. Shimura and H. Watanabe, Osaka University, *Hiroshima University

Back-side illuminated single-crystalline GeSn photodiode array has been demonstrated on a quartz substrate for group-IV-based NIR imager chip. Owing to high crystalline quality of GeSn array formed by laser-induced liquid-phase crystallization technique, significantly enhanced NIR photoresponse with high responsivity of 1.3 A/W was achieved operated under back-side illumination.

Record Performance from GeSn Backside Imager: An Osaka University-led team will report on a backside-illuminated germanium-tin (GeSn) photodiode array with a high responsivity of 1.3 A/W at 1550nm, a record high on/off ratio of 5 decades, and low dark current of 10-3 A/cm2. They formed the large-area, tensile-strained and single-crystal GeSn device on a quartz substrate by using laser-induced liquid-phase crystallization. Because quartz has a high transparency to NIR frequencies, and can be combined directly with silicon, this work opens up the possibility to monolithically integrate high-performance GeSn NIR imagers with silicon CMOS circuitry.

In the schematic on the left, (a) is an illustration of lateral liquid-phase crystallization of GeSn wire on a quartz substrate by rapid thermal annealing, while (b) is an in-situ observation of lateral liquid-phase growth of GeSn wire.

At right is a schematic of the fabrication process and an optical image of a single-crystal GeSn n+/p photodiode array on a quartz substrate. P+ implantation was performed to form the n+ regions of the diodes.

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Chronocam CEO Luca Verre talks about the company's bio-inspired approach to vision at Hello Tomorrow Summit 2017:

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NHK, Brookman, TSMC, and University of Tokyo publish an open-access IEEE TED paper "A 1.1- μm 33-Mpixel 240-fps 3-D-Stacked CMOS Image Sensor With Three-Stage Cyclic-Cyclic-SAR Analog-to-Digital Converters" by Toshiki Arai, Toshio Yasue, Kazuya Kitamura, Hiroshi Shimamoto, Tomohiko Kosugi, Sung-Wook Jun, Satoshi Aoyama, Ming-Chieh Hsu, Yuichiro Yamashita, Hirofumi Sumi, and Shoji Kawahito. The paper describes, basically, a 1-inch 8K video sensor with a slow-motion function:

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Omnivision patent application US20170345851 "Graded-Semiconductor Image Sensor" by Dajiang Yang, Gang Chen, Duli Mao, and Dyson Tai propose SiGe graded epi doping to enhace IR response:

"Detection of infrared (IR) light is useful in automotive and night vision applications. However, conventional image sensor devices may poorly absorb infrared light due to the band structure of semiconductor materials used in modern microelectronic devices. Even if conventional image sensors can absorb IR light, the semiconductor may need to be sufficiently thick. Additional semiconductor thickness may complicate other fabrication steps and/or reduce performance."

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OSA Optica publishes a paper "Photon-number-resolving megapixel image sensor at room temperature without avalanche gain" by Jiaju Ma, Saleh Masoodian, Dakota Starkey, and Eric Fossum, Dartmouth College, NH, USA. From the abstrac t:

"Termed a quanta image sensor, the device is implemented in a commercial stacked (3D) backside-illuminated CMOS image sensor process. Without the use of avalanche multiplication, the 1.1 μm pixel-pitch device achieves 0.21e−  rms average read noise with average dark count rate per pixel less than 0.2e−/s, and 1040 fps readout rate. This novel platform technology fits the needs of high-speed, high-resolution, and accurate photon-counting imaging for scientific, space, security, and low-light imaging as well as a broader range of other applications."

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DisruptorDaily publishes an interview with Almalence CEO Eugene Panich talking about the recent developments in mobile imaging. The most interesting part talks about 1-inch smartphone cameras:

"Our recent development, a collapsible camera system having just 3 millimeters in height and utilizing 1-inch sensor, normally found in those big cameras. (To compare – your smartphone camera normally has 1/3 inch or 1/2.4 inch sensor, collecting ten times less light). To accommodate such a big sensor, our camera module pops up when you need to take a shot and collapses into a slim structure on standby, allowing the users to take images that only a DSLR could take and still fitting in the pocket form factor of a mobile phone."

I can imagine a global CIS wafer capacity shortage, if indeed the whole mobile industry starts a transition to 1-inch cameras.

Almalence site shows some of its customers and partner companies:

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BusinessWire: Rockwell Automation acquires Odos Imaging, a Scottish maker of pulsed ToF cameras for industrial imaging applications. Rockwell Automation will apply this technology to sensing products to deliver solutions to a broad range of demanding industrial applications including automotive and general assembly, packaging and material handling, and logistics.

“We are delighted to be joining Rockwell Automation and continue the development of 3-D imaging solutions for industrial applications,” said Chris Yates, CEO, Odos Imaging. “Rockwell Automation is a company we have long admired for its ongoing commitment to innovation and substantial domain expertise. We very much look forward to playing our part in the ongoing strategy and helping to achieve the vision of a productive and sustainable future.”

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X-FAB announces the expansion of its 180 nm XH018 mixed-signal CMOS process with three new transistors: a 1.8 V low-noise NMOS, a 3.3 V low-noise NMOS and a 3.3 V low-noise PMOS – all of which offer drastically reduced flicker noise compared to standard CMOS offerings.

The new 1.8 V low-noise NMOS transistor introduced by X-FAB delivers an improvement factor of eight times lower flicker noise compared to the standard XH018 device. The new 3.3 V low-noise NMOS transistor gives up to ten times lower flicker noise, while the flicker noise for the 3.3 V low-noise PMOS transistor that complements it is halved for all drain currents.

Although XH018 process is not an image sensor process, it offers a photodiode module. It's not immediately clear whether the new transistors can be used in X-FAB's XS018 180nm image sensor-dedicated process.

Luigi Di Capua, Director Marketing at X-FAB, commented: “X-FAB has been setting the benchmark for low-noise performance in its 350 nm technology for many years. We are proud to now also offer industry-leading low-noise devices via our 180 nm XH018 platform. By adding just one extra mask layer, all three ultra-low-noise transistors can be incorporated into noise-sensitive circuit designs.”

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Espros November edition of its newsletter (email-only, yet to be posted on their web site) shows an extensive ToF sensors lineup:

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Northwestern University, Evanston, IL and Rice University, Houston, TX researches publish a paper "CS-ToF: High-resolution compressive time-of-flight imaging" by Fengqiang Li, Huaijin Chen, Adithya Pediredla, Chiakai Yeh, Kuan He, Ashok Veeraraghavan, and Oliver Cossairt. The authors propose to use a dynamically changing illumination pattern to improve ToF sensor resolution:

"Based on the proposed architecture, we developed a prototype 1-megapixel compressive ToF camera that achieves as much as 4× improvement in spatial resolution and 3× improvement for natural scenes. We believe that our proposed CS-ToF architecture provides a simple and low-cost solution to improve the spatial resolution of ToF and related sensors."

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GlobeNewsWire: Soitec announces the latest generation of SOI substrates in its Imager-SOI product line designed specifically for front-side imagers for NIR applications including 3D image sensors. The new SOI wafers are now available in large volumes with high maturity for 3D cameras used in AR and VR, facial-recognition security systems, advanced human/machine interfaces and other emerging applications.

"Our newest Imager-SOI substrates represent a major achievement for our company and a smart way to increase performance in NIR spectrum domain, accelerating new applications in the growing 3D imaging and sensing markets," said Christophe Maleville, EVP of the Digital Electronics Business Unit at Soitec. "Innovative sensor design on SOI is achieved by leveraging our advanced know-how in ultrathin material layer transfer and our extensive manufacturing experience."

The wafers are available in 300mm with BOX from 15nm to 150nm and “Epi Ready” Top silicon from 50nm to 200nm.

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MIPI Alliance releases a new specification that provides a standardized way to integrate image sensors in mobile-connected devices. The new specification, MIPI Camera Command Set v1.0 (MIPI CCS v1.0), defines a standard set of functionalities for implementing and controlling image sensors. The specification is offered for use with MIPI Camera Serial Interface 2 v2.0 (MIPI CSI-2 v2.0).

MIPI CCS makes it possible to craft a common software driver to configure the basic functionalities of any off-the-shelf image sensor that is compliant with MIPI CCS and MIPI CSI-2 v2.0. The new specification provides a complete command set that can be used to integrate basic image sensor features such as resolution, frame rate and exposure time, as well as advanced features like PDAF, single frame HDR or fast bracketing.


The CCS spec is available for a free download here.

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Many old ideas are recycled with a new twist - in this case the twist is the new materials. Arxiv.org paper "Two-dimensional material based "field-effect CCD" by Hongwei Guo, Wei Li, Jianhang Lv, Akeel Qadir, Ayaz Ali, Lixiang Liu, Wei Liu, Yiwei Sun, Khurram Shehzad, Bin Yu, Tawfique Hasan, and Yang Xu from Zhejiang University, China, State University of New York, USA, and University of Cambridge, UK says:

"In this work, we reported a novel detecting/imaging device concept called field-effect CCD (FECCD), which is based on CCD’s MOS photogate but requires no charge transfer between pixels (i.e. “couple”). The “couple” is re-defined as the capacitive coupling21,22 between the semiconductor substrate and the 2D material (e.g. graphene). In the semiconductor, we created the potential well for charge integration by applying a gate voltage pulse. In the 2D material, the non-destructive and direct readout along with the charge signal amplification was realized by the strong field effect.

Besides, the charge integration in our FE-CCD is beneficial for the low-light-level condition, and gives high linearity for accurate image capturing. The FE-CCD also shows a broadband response from visible to short-wavelength infrared (SWIR) wavelength, and its power consumption is readily suppressed by using the 2D-material hetero-junction."

Schematic of our FE-CCD pixel. The gate can be driven by fast -sweeping or pulsed voltage. Holes (blue spheres) are generated and integrated in the potential well with corresponding electrons (red spheres) transferred to graphene.

(a) The proof-of-concept FE-CCD linear array working in both random-access mode and charge transfer mode. Top: the FE-CCD linear array wire-bonded to the printed-circuit board. Bottom: the enlarged the optical image of the FE-CCD linear array. Scale bar: 50 um. (b, c) Reflection images at different integration time obtained by scanning the single graphene-based FE CCD pixel under the incandescent light (power density 5×10-5 W/cm2).

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BusinessWire: Under the leadership of visionary inventor and entrepreneur David Hall, Velodyne announces VLS-128 LiDAR sensor for autonomous vehicle market. Featuring a 128 laser channels, the VLS-128 is said to be "an extreme step forward in LiDAR vision systems, featuring the trifecta of highest resolution, longest range, and the widest surround field-of-view of any LiDAR system available today."

“The VLS-128 is the best LiDAR sensor on the planet, delivering the most advanced real-time 3D vision for safe driving,” said Mike Jellen, President, Velodyne LiDAR. “Automotive OEMs and new tech entrants in the autonomous space have been hoping and waiting for this breakthrough.”

Velodyne’s VLS-128 succeeds the HDL-64, still considered to be the industry benchmark for high resolution. Velodyne’s new flagship model has a 10 times higher resolving power than the HDL-64.

“The Velodyne VLS-128 is an all-out assault on high-performance LiDAR for autonomous vehicles. With this product, we are redefining the limits of LiDAR and we will be able to see things no one has ever been able to see with this technology,” said David Hall, Founder and CEO, Velodyne LiDAR.

Velodyne has performed customer demonstrations of the VLS-128 and plans to produce it in scale at the company’s new Megafactory in San Jose. Hall adds, “We have been demonstrating the product for the first time to customers and they can’t wait to get their hands on them. We will be shipping the VLS-128 by the end of 2017.”

“With Velodyne’s efforts in advanced robotics, my goal is to reinvent manufacturing in the United States, making the business case for US-based production that gets shipped to autonomous vehicle development projects the world over,” said Hall.

Based on mass-produced semiconductor technologies, the VLS-128 is designed for automated assembly in Velodyne’s Megafactory using a proprietary laser alignment and manufacturing system to meet the growing demand for LiDAR-based vision systems.

VLS-128 (right) succeeds the HDL-64 (left)

Comparison of VLS-128 (top) to the HDL-64 (bottom) point clouds

A Youtube video demonstrates the new LiDAR speed, resolution and range:



Update: MIT Technology Review publishes Velodyne CTO Anand Gopalan statement that VLS-128 "beams are separated by angles as small as 0.1°, with a range of 300 meters, and create as many as four million data points per second as they spin through 360 degrees."

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Many sites quote German-language WinFuture showing few slides from Huawei presentation of its oncoming smartphone depth camera. The camera is said to use a "stripe projector" to create 300,000 3D points in 10s time. Huawei uses its AI hardware engine to recognize the faces in 400ms, slightly slower than fingerprint sensors in the company's phones.

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MDPI Sensors has kindly agreed to publish extended versions of selected papers from 2017 IISW. The Special Issue starts from TSMC paper on RTN:

"Statistical Analysis of the Random Telegraph Noise in a 1.1 μm Pixel, 8.3 MP CMOS Image Sensor Using On-Chip Time Constant Extraction Method" by Calvin Yi-Ping Chao, Honyih Tu, Thomas Meng-Hsiu Wu, Kuo-Yu Chou, Shang-Fu Yeh, Chin Yin, and Chih-Lin Lee. The paper has a large collection of RTN measurements data and its interpretation:

(a,b) Two example pixels showing 3 clearly identifiable histogram peaks. This is the signature behavior of pixels with a single RTN trap as the result of the CDS subtraction. The 2 side peaks are symmetric in magnitudes and in populations, which indicates that the probabilities of trap occupancy (PTO) during the first sampling and the second sampling are approximately equal.

(a,b) Two example pixels showing 3 clearly identifiable histogram peaks with 2 asymmetric side peaks. These are believed to be the single RTN trap behaviors as well. But the probabilities of trap occupancy (PTO) during the first sampling and the second sampling of the CDS are not equal.

(a) The distributions of the RTN characteristic time constants at different temperatures. The RTN time constants are extracted from the 1000 noisiest pixels of 3 samples; (b) The Arrhenius plots of the medians of the RTN time constants for 3 samples.

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ESMChina presents Ginwatec Deep Neural Processor that implements face recognition with 97% accuracy at about 10-80x lower power than Apple Face ID. I wonder whether they find a good application for that:


Ark-Invest publishes a grossly incomplete list of Neural Processing chip companies:


Meanwhile, Alipay introduced face recognition-based "Smile to Pay" service in China:

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Harvest Imaging announces its 2017 Forum Agenda “Noise in Analog Devices and Circuits” by Christian Enz:

• Introduction
• Random signals and noise, Main noise sources of circuit components
• Noise models of basic components
• Noise Calculations in Circuits
• Noise calculation in continuous-time (CT) circuits
• Noise sampling
• Noise calculation in switched-capacitor (SC) circuits
• Noise simulation
• Trade-offs between Noise and Power Consumption
• The simplified EKV MOS transistor model
• The concept of inversion coefficient and the design methodology
• Basic trade-offs in analog design
• Figures-of-merit (FoMs) as design guidelines, Key FoMs parameters extraction
• Noise and Offset Reduction Techniques
• Switch nonidealities
• The Autozero (AZ) technique
• The Chopper Stabilization (CS) technique
• Recent trends in noise and offset reduction techniques
• Example of a Low-noise CMOS Imager
• CMOS image sensors (CIS)
• Noise reduction in CIS
• A sub 0.5erms noise VGA imager in standard CMOS
• Future improvements

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IFNews publishes its predictions about 2018 smartphone market, including 3D cameras and AI adoption:

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Justin Richardson's PhD thesis "Time Resolved Single Photon Imaging in Nanometer Scale CMOS Technology," that formed a foundation of ST SPAD products, has been published by Edinburgh University.

Although the thesis is dated by May 2010, some parts of it remains to be sensitive and painted in black, especially those related to SPAD process and device modeling on pp. 84-126. In spite of this, the thesis possibly can serve as one of the best encyclopedias of SPAD devices, architectures, and circuits.


There is a lot more data and ideas in the thesis, just too much to quote everything here.

Thanks to Justin Richardson for letting me know about the publication!

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