Next-Gen Tensilica Vision Processor IP

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BDTI publishes an article on the next generation Cadence Tensilica Vision P5 Processor IP featuring lower power and higher speed:

The base P5 core is said to be less than 2 mm2 in size in a 16nm process, with minor additional area increments for the optional FPU and cache and instruction memories. Lead customers have been evaluating and designing in Vision P5 for several months, and the core is now available for general licensing.

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