Sony to Use FD-SOI in its Stacked Sensors

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EETimes reports from FD-SOI Forum held on Jan 21 in Tokyo, Japan: "the biggest FD-SOI news, which surfaced as chatter and whispering during coffee breaks at the Forum (rather than on the formal agenda), is that Sony is looking to use FD-SOI for the image signal processor (ISP) on stacked CMOS Image Sensors (CIS).

Although this buzz was also confirmed outside the Forum, neither Globalfoundries nor Sony is talking.

Three industry sources, however, independently told EE Times that chip stack CIS will open FD-SOI’s much needed, genuine volume market. Sony, today, is the world’s largest CIS supplier.

Word on the street is that Sony will be working with Globalfoundries on chip stack CIS, instead of Samsung. The Japanese consumer electronics giant wants to avoid any potential conflict with Samsung (who is also in the CIS business).

Ray Fontaine, Senior Technology Analyst at Chipworks, said that Sony is using its 65nm process for some of its stacked chip ISPs and TSMC 40nm for the ISPs of others (including recent iPhone stacked chip CIS).

Pierre Cambou, activity leader, Imaging & Sensors at Yole Développement, said that using FD-SOI for ISPs “would be a very interesting technical option to minimize the heat generated by the ‘ISP’ secondary chip.

Presently, Sony uses Globalfoundries FD-SOI process for its 10mW low power GPS chip, with main end application being Casio GPS watches. However, its next generation has been reported to use ST 28nm FD-SOI process.

Update: Samsung FD-SOI slide suggests that there is an activity on integrating it with CIS:

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